The number of instructions in AMD's ISA that support the per-ALU dual-FP32 feature is limited, yes.
The guys over at Chips and Cheese couldn't find a way to measure the dual-issue output until they tested Nemes' compute benchmark for Vulkan. I think they don't know what Nemes is using in her benchmark to trigger the ability but the feature is there nonetheless, so it can be used. Assuming it all fits in the caches and registers, of course.
It would probably be dead weight in the PC space except for stuff they fully control like driver-level features (FSR1, AFMF, etc.) or wherever they can hand-tune driver optimizations. Sony however owns the platform and the SDK so they can implement these optimizations directly into the compiler, and they can automate a list of optimizations for their 1st party engines as well as the widely used ones (UE5, Anvil, etc.).